Samsung Electronics is stepping up its development in the semiconductor technology as using two approaches for stacking mobile application processors (APs). It is also planning to use 3D stacking technology using Hybrid bonding and Thermocompression Non-Conductive Adhesive Film (TC-NCF) to the mobile AP’s performance.
Direct copper bonding, a modern generation smart packaging technology for signal interconnects, is known in the industry as hybrid bonding and seen as the way forward for semiconductor stacking. Therefore, while it is quite useful for mainstream semiconductors such as Open Beta mobile APs, it is relatively immature for system semiconductors. To make up for the aforementioned gap, Samsung is targeting TC-NCF, which has already found success in the realm of HBM stacking.
Based on the performance tests recently conducted using TC-NCF, particularly for mobile APs the results have been excellent. The technology reduces the disparity of the will—bump—connection points enhanced performance. Samsung’s internal structure exposes this method, affirming the function that TC-NCF plays for its future semiconductor stacking plan.
This one needs to be followed by the mass production of 3D stacked mobile APs by 2026, by stacking semiconductors with different functionalities similar to HBM for AI like in the present models. Second, mobile APs have already reached a high level of readiness for native TC-NCF while hybrid bonding remains likely a long-term prospect.
Although earlier critics associated TC-NCF with yield problems in HBM production, Samsung has remained confident in this technology. According to the company, improvements in the TC-NCF materials will result in better performance. Additional establishing partnerships with the suppliers such as LG Chem and Resonac Samsung continue relationships to encourage enhance this method related to HBM and consolidate its supply chain.
Samsung’s ongoing investment in TC-NCF and hybrid bonding stand out for the company as it continues to compete for the miniaturization of semiconductors in the dynamic operating environment.
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